AI for Hardware Security: How to Defend Silicon Against Attacks
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작성자 최고관리자 댓글 조회 작성일 26-08-11 09:04본문
- 강연자
- Dr. Hassan Nassar (Karlsruhe Institute of Technology)
- 초청자
- 시스템반도체공학과 정재용 교수 (jyc@yonsei.ac.kr)
[해외 연사 초청 특강 안내]
독일 칼스루에 공과대학교(KIT)의 Hassan Nassar 박사를 모시고 'AI 기반 하드웨어 보안'을 주제로 아래와 같이 특강을 개최합니다. 관심 있는 구성원분들의 많은 참여 바랍니다.
■ Title
AI for Hardware Security: How to Defend Silicon Against Attacks
■ Abstract
Modern computing platforms increasingly combine IoT devices, cloud and edge systems, FPGA accelerators, and AI workloads, creating a rapidly expanding attack surface. This talk explores how machine learning can be used to strengthen hardware security against three classes of threats: control-flow attacks, side-channel tampering, and FPGA-based fault-injection attacks. First, the talk presents lightweight control-flow attestation using unsupervised learning, where execution features such as IPC and cache activity are used to distinguish normal execution from runtime attacks without relying on exhaustive control-flow graph verification. Second, it discusses the detection of side-channel tampering through lightweight on-chip machine learning that identifies abnormal power and temperature patterns despite variations in ambient conditions and background load. Finally, the talk introduces graph neural networks for detecting malicious FPGA power wasters by modeling post-synthesis netlists as graphs and identifying suspicious substructures before deployment. Together, these examples show how AI can move hardware security from manually designed defenses toward adaptive, data-driven protection mechanisms for modern silicon platforms.
■ Speaker Bio
Dr. Hassan Nassar received his B.Sc. degree (Highest Hons.) from the German University in Cairo, New Cairo City, Egypt, in 2016, and his M.Sc. degree from Ulm University, Ulm, Germany, in 2019. He successfully defended his Ph.D. (with distinction) at the Karlsruhe Institute of Technology in 2024. Since March 2020, he has been with the Chair for Embedded Systems at Karlsruhe Institute of Technology. His research interests include hardware security, reconfigurable architectures, memory reliability, and cloud FPGAs.
독일 칼스루에 공과대학교(KIT)의 Hassan Nassar 박사를 모시고 'AI 기반 하드웨어 보안'을 주제로 아래와 같이 특강을 개최합니다. 관심 있는 구성원분들의 많은 참여 바랍니다.
■ Title
AI for Hardware Security: How to Defend Silicon Against Attacks
■ Abstract
Modern computing platforms increasingly combine IoT devices, cloud and edge systems, FPGA accelerators, and AI workloads, creating a rapidly expanding attack surface. This talk explores how machine learning can be used to strengthen hardware security against three classes of threats: control-flow attacks, side-channel tampering, and FPGA-based fault-injection attacks. First, the talk presents lightweight control-flow attestation using unsupervised learning, where execution features such as IPC and cache activity are used to distinguish normal execution from runtime attacks without relying on exhaustive control-flow graph verification. Second, it discusses the detection of side-channel tampering through lightweight on-chip machine learning that identifies abnormal power and temperature patterns despite variations in ambient conditions and background load. Finally, the talk introduces graph neural networks for detecting malicious FPGA power wasters by modeling post-synthesis netlists as graphs and identifying suspicious substructures before deployment. Together, these examples show how AI can move hardware security from manually designed defenses toward adaptive, data-driven protection mechanisms for modern silicon platforms.
■ Speaker Bio
Dr. Hassan Nassar received his B.Sc. degree (Highest Hons.) from the German University in Cairo, New Cairo City, Egypt, in 2016, and his M.Sc. degree from Ulm University, Ulm, Germany, in 2019. He successfully defended his Ph.D. (with distinction) at the Karlsruhe Institute of Technology in 2024. Since March 2020, he has been with the Chair for Embedded Systems at Karlsruhe Institute of Technology. His research interests include hardware security, reconfigurable architectures, memory reliability, and cloud FPGAs.
